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CPU

CPU

2015-07-15 18:02:44   0  举报

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五级流水线CPU设计图

CPU

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大纲/内容

RegWr

PC

WB

EX_PC_4[31:0]

EX_DatabusB[31:0]

ID_DatabusB[31:0]

CONTROL

PCWrite

Writedata

Shift left 2 bits

IF_ID_Wr

[25-21]

EX/MEM

MEM_Rback[4:0]

1MUX0

forwardA

16

MUX

EX_Rback[4:0]

MEM_PC_4[31:0]

ID_PC_4[31:0]

[15-11]

ID_DatabusA[31:0]

Hazards

Rs

+

Readdata 2

IF_PC_4[31:0]

MEM

ID_EX_Rt

MEM_AlUout[31:0]

WB_PC_4[31:0]

EX_AlUout[31:0]

ID_EX_PCSrc

EX_Shamt[4:0]

Readdata

ID_Instruct[31:0]

ID_PCSrc

2

ID_Imm[15:0]

ID/EX

WB_AlUout[31:0]

WriteData

ALUout

ID_EX_clear

Rd

IF_Instruct[31:0]

0MUX1

IF_ID_RsIF_ID_Rt

IF_ID_clear

寄存器堆

EX

数据存储器

[15-0]

Forward

ALUOut0

ID/EX.MemRead

ConBA

Write register 1

EX_Imm[15:0]

Address

IF/ID

Rt

1

ID_Shamt[4:0]

0

MEM_DatabusB[31:0]

[20-16]

Read register 1

MEM_dataMEMout[31:0]

EX_DatabusA[31:0]

[10-6]]

EXT32

EX.MEM.Rd

Readdata 1

指令存储器

MEM/WB

Read register 2

WB_dataMEMout[31:0]

forwardB

ALU

 Collect

Get Started

CPU

 Collect

Get Started

cpu

 Collect

Get Started

CPU

 Collect

Get Started

CPU

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