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T-Rex_Top
2016-01-02 22:57:14
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Verilog top design of a game
Verilog
FPGA
模版推荐
作者其他创作
大纲/内容
Random Number GeneratorRandomly generate an obstacle and the type of the obstacle.
VGA Port A driver to display the data.
CurrentColumn
Distance Meter(Score Board)to record the high score and current score.
data_out
CurrentRow
Pulse toGenerateObstacles
Clockto produce the clock for each module
Positions
Calculate the data to display according the state of the game and the T-Rex and the positions of the objects.
Control
High score
PS2 Keyboard to control the game.
States
Current Score
A module to control the position of allthe objects in the game.
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T-Rex_Top
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Lab3FlowChart
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Assignment2
X___X
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